Goal: Get the CPU free-running on a NOP instruction
There’s two ways to do this. One way is really simple but ever-so-slightly unsafe, the other way is much safer. You can either directly wire the binary pattern for a NOP instruction using wires to +5V and GND. Or you can put resistors there, so that it won’t fry if you get the bit pattern wrong and the CPU tries to write to the data bus.
I picked the second route, which means that D1, D3, D5, D6, and D7 all have a 4.7k ohm resistor to the +5V line and the three other lines (D0, D2, D4) are all tied to 47 ohm resistor on the GND line.
http://www.6502.org/mini-projects/nop-gen/nop-gen.htm
On Amazon, I got some ribbon cable that was already crimped to cute little one-pin housings. I’ve divided these into little 8 bit bus lines and I’m routing them to where the Flash RAM is eventually going to live.